1. Field of the Disclosure
This specification relates to a liquid crystal display (LCD) device, and particularly, to increasing the space available in the driving circuitry of an LCD device, the LCD device having a reduced number of data driver channels shared between neighboring pixels through a multiplexer (MUX). The LCD device of the present disclosure may increase space availability by reducing the number of transistors included in the MUX.
2. Background of the Disclosure
With the development of electronic information devices, such as various types of portable devices, for example, mobile phones and notebook computers, HDTV and the like, which can realize images with high resolution and high quality, the demands on the flat panel displays used in these devices are increasing. Such flat panel displays may include a liquid crystal display (LCD) device, a plasma display panel (PDP) device, a field emission display (FED) device, an organic light emitting diodes (OLED) device, or the like. The LCD device is the most widely studied of these devices with regard to mass production technology, facilitation of driving means, realization of images with high qualities, and implementation of large-scale screens.
The LCD device generally has a structure including a liquid crystal display panel provided with a plurality of gate lines, a plurality of data lines intersecting with the gate lines, and a plurality of pixels each having a thin film transistor as a switching element disposed on each intersection, to realize a gradation (or gray scale) of an image according to changes in optical transmittance of liquid crystals in response to a data signal applied to each pixel. In such a structure, each pixel typically has to be connected with at least one gate line and at least one data line, one data line has to be assigned to each pixel arranged along the same horizontal line, and each data line has to be connected to one channel of a data driver that supplies a data signal, in a manner of one-to-one correspondence.
However, the trend of large-scale and high resolution LCD devices has given rise to a gradual increase in the number of data lines. This has caused an increase in the number of channels of a data driver. Also, as a line (pipe) structure for these data lines becomes more complicated, fabrication costs of the data driver have increased.
To solve these problems, a structure of sharing the channels of the data driver such that two or more data lines share one channel has been proposed. For example, FIG. 1 is a view illustrating a part of an LCD device to which this related art channel-sharing structure is applied. FIG. 1 shows an example structure employing a 3×1 multiplexer connecting three data lines to one channel.
As illustrated in FIG. 1, an LCD device having a channel sharing structure such as that of the related art may have a liquid crystal display panel 10 divided into a display region having a plurality of pixels PX, and a non-display region located between the display region and a data driver (not illustrated). Also, the LCD device may be provided with a switching circuit 50 having a plurality of switching elements MT1 to MT3 on the non-display region. The plurality of switching elements MT1 to MT3 connect data lines DLm-2, DLm-1, and DLm, which are connected to three neighboring pixels R, G, and B, respectively, to one channel Chn.
The switching circuit 50 drives the switching elements MT1 to MT3 in a time-division manner such that one horizontal period, during which time a gate driving signal Vg is applied, is divided into three sections (as shown for example in the signal waveform of FIG. 2) according to control signals S1 to S3 of a multiplexer mounted in a timing controller or a data driver (not illustrated), so as to apply data signals for pixels R, G, and B, respectively. This sort of arrangement is capable of reducing the number of channels of the data driver by one third (⅓) as compared with conventional art.
The time-division discussed above is a method of dividing one horizontal period into three sections, turning on the first switching element MT1 to charge the pixel R through the data lines DL1, DLm-2, and then turning on the second switching element MT2 to charge the pixel G through the data lines DL2, DLm-1.
However, in the structure of the switching circuit 50 of this related art, the switching elements MT1, MT2, and MT3 should be connected to the data lines DLm-2, DLm-1 and DLm in a one-to-one correspondence. A high-resolution LCD device can suffer from having to arrange the switching elements MT1, MT2, and MT3 within the limited space of the non-display region. This limited space issue is exacerbated by the recent trends of reducing the pitch between pixels. Also, it may be difficult to implement an LCD device employing a narrow bezel which minimizes a width of the non-display region.